ChangXin Memory Technologies, the Chinese memory chipmaker known as CXMT, said on Sunday that its fifth-generation DRAM technology platform has entered mass production, a claim the Hefei-based company made at the 2026 World Manufacturing Convention in Hefei, Anhui Province. CXMT said the platform, called G5, reduces the spacing of key features in the part of the chip that stores data to an 11.95 nanometre active-area half-pitch, roughly 12 billionths of a metre.
DRAM is the short-term working memory that phones and computers use to run applications. The market for it has been dominated for years by Samsung Electronics of South Korea, SK Hynix and Micron Technology of the United States, three suppliers whose process roadmaps and pricing have set the pace for the industry. Memory is a cyclical business, and the current upcycle has been driven by demand from artificial intelligence servers.
CXMT said the new platform is designed to make more powerful memory chips at lower cost and with less power use, and that it would give electronics makers an additional source of supply for chips used in smartphones and other devices. The company listed on Shanghai's STAR Market this year and trades under the ticker 688825.SS.
The advance lands as Beijing pushes to reduce reliance on foreign semiconductor technology. US export controls in place since 2022 have restricted China's access to advanced chipmaking equipment, and that constraint shapes almost everything about how CXMT designed and built the G5 platform. Chipmakers in China have responded by leaning harder on deep ultraviolet tools, multiple patterning and domestic equipment suppliers, and the G5 platform is the clearest test yet of how far that approach can go.
Key Facts
Reuters reported on September 20, 2026 that CXMT said its fifth-generation technology platform had entered mass production, describing it as a claimed breakthrough that could help China build a stronger competitor to Samsung, SK Hynix and Micron in the global memory market. The company reached the 11.95 nanometre figure using quadruple patterning, a process that repeats several manufacturing steps to produce finer circuit patterns, rather than the extreme ultraviolet lithography that rivals adopted for their most advanced nodes.
Global Times reported on September 20, 2026 that the G5 platform uses self-aligned quadruple patterning, known as SAQP, and features an active-area half-pitch of 11.95 nanometres for memory arrays, along with an array capacitor aspect ratio of 45 to 1, a DRAM-optimized high-k metal gate process and a core cell array height reduced to 6,762 nanometres. The publication also noted progress in interface engineering, saddle-fin structures and low-k spacer bitlines.
CXMT unveiled two 24-gigabit LPDDR5X products built on the new platform, each holding 50% more data than its previous equivalent products. Both are already in mass production and come in two package formats, one with 496 balls and one with 245 balls, aimed at mid-range and high-end smartphones and portable consumer electronics. At 24 gigabits, a single DRAM die holds 3 gigabytes.
On density, CXMT said the platform can produce at least 50% more gross chip dies per wafer than its fourth-generation platform, using an 8-gigabit-chip baseline. That figure counts chips before defective units are excluded. Seoul Economic Daily reported on September 20, 2026 that the company did not disclose specific yields or monthly output, a gap that leaves the commercial weight of the announcement unclear.
Luo Xiaodong, CXMT's vice president and head of its marketing centre, said at the convention that the company's process capability is now on par with the most advanced mass-produced nodes out there in the industry. CXMT said it developed the platform using computer simulations, including a digital twin system covering the full product lifecycle from design to manufacturing and maintenance, and joint work with Chinese chip-equipment makers.
Analysis
The bigger picture here is that CXMT has demonstrated something the equipment export controls were designed to prevent: progress in leading-edge DRAM density without access to EUV lithography. BigGo Finance reported on September 20, 2026 that Samsung and SK Hynix introduced EUV starting with their 1a generation, while CXMT, blocked from acquiring EUV equipment, matched the level of miniaturization using SAQP, which repeats deep ultraviolet exposure four times.
That framing deserves scrutiny. Seoul Economic Daily reported on September 20, 2026 that some analysts note that 11.95 nanometres measures one specific core structure and is therefore hard to compare directly with the 12-nanometer-class process names used by Samsung, SK Hynix and Micron. A half-pitch number for an active area is not the same as a branded node label, and CXMT has published no yield data, no monthly wafer output and no defect-density figures, so the claim of parity rests on a single structural measurement rather than on shipped, qualified product.
Still, the market evidence points to real momentum. BigGo Finance reported that Counterpoint Research put Q2 2026 global DRAM market share at Samsung 38%, SK Hynix 25%, Micron 24% and CXMT 10%, with CXMT's share more than doubling from 4% a year earlier and the big three's combined 87% falling below 90% for the first time in over a decade. Global Times cited TrendForce saying global DRAM industry revenue jumped 59.5% quarter on quarter in Q2 2026, while supply expansion continued to lag demand growth.
Analyst Ma Jihua said the DRAM market is still dominated by Samsung Electronics, SK Hynix and Micron, which makes advances by additional players closely watched. What this really means is that CXMT is no longer a niche supplier filling gaps at trailing nodes: it is now positioned as a cost competitor at the leading edge of commodity DRAM, at the exact moment when AI servers are absorbing capacity and prices are rising. Rivals continue to steer their most advanced capacity toward the AI segment, where the sources describe a bottleneck expected to last through 2028.
Why It Matters
The strategic stakes run in two directions. For China, a domestically developed G5 platform reduces exposure to export controls and gives local electronics makers a supply source that does not depend on Korean or American allocation. Reuters reported on September 20, 2026 that CXMT said it would give electronics makers an additional source of supply for chips used in smartphones and other devices, and the company framed the platform around lower cost and lower power use. Coverage in Chinese media, including Global Times, presented the launch as a new breakthrough in process scaling, a signal that the development carries national industrial weight as well as commercial intent.
For Samsung, SK Hynix and Micron, the arithmetic is less comfortable. A supplier that can raise gross dies per wafer by at least 50% against its own previous generation, while pricing commodity LPDDR5X into mid-range and high-end phones, compresses the premium the big three earn on mainstream parts. A Taiwanese PC maker said Chinese output has risen enough that commodity memory, at least, is no longer in short supply, even as analysts see the AI memory bottleneck lasting through 2028.
CXMT's roadmap extends past DRAM. BigGo Finance reported that the company is pursuing high bandwidth memory development and that reports on September 18 said it plans a NAND flash research and production line at a new Beijing facility. If those programs advance, CXMT becomes a competitor across the memory stack rather than in a single product family.
Next Up
The first thing to watch is disclosure. CXMT has confirmed mass production but not yields, monthly output or customer qualification, and those numbers will determine whether the G5 platform translates into revenue share or remains a demonstration of process capability. The second is high bandwidth memory: progress there will decide whether CXMT can compete in the AI segment where Samsung, SK Hynix and Micron currently concentrate their most advanced capacity. Investors will also be watching how the big three respond on pricing in the LPDDR5X segment, where two 24-gigabit products from CXMT now compete directly with mainstream mobile memory.
Meanwhile the broader market will keep moving. With DRAM revenue up 59.5% quarter on quarter in Q2 2026 and supply still lagging demand, the big three have both the pricing power and the incentive to defend their positions, and CXMT's next milestone will be measured in wafers shipped, not in nanometres announced.
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